VCDL without distortion into the outputs

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a175fc80-e462-42d1-8c6d-7f3b5e9e5252-1.zip

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Description

SPICE simulation of a modified VCDL. This version of Voltage-Controlled Delay Line regenerates full logic levels without introducing distortion into the signals. In this VCDL has been changed the last stage to two diff-amps with swapped input signals. The resulting signals have a width greater than the unmodified version. To get full logic levels, signals pass through inverters.

  • Free
  • Advanced
  • 51-100
  • LTspice
  • IV
  • No
  • above outp and outm below outmb and outpb after the inverters diffamp

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