Description
SPICE simulation of the mode operation of a sample and hold circuit. The output of the circuit latches the input signal when the S/H input is High, the other output circuit follows the input signal when the clock input is high.
0 Credits
SPICE simulation of the mode operation of a sample and hold circuit. The output of the circuit latches the input signal when the S/H input is High, the other output circuit follows the input signal when the clock input is high.
Only logged in customers who have purchased this product may leave a review.
Reviews
There are no reviews yet.