3 inputs NAND gate with CMOS

(1 customer review)

0 Credits

934af2b1-2fcf-44eb-b0f3-af1e20f65d25.rar

Login for download

Description

LTspice siulation of a NAND static logic gate with 3 parallel PMOS and 3 series NMOS. Analysis of voltage transfer curve.

  • Free
  • Intermediate
  • <10
  • LTspice
  • IV
  • No
  • voltage transfer curve of NAND gate

1 review for 3 inputs NAND gate with CMOS

  1. Sandeep601

    the file is not present showing error

Only logged in customers who have purchased this product may leave a review.