3 inputs NOR gate with CMOS

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LTspice simulation of a NOR static logic gate with 3 parallel NMOS and 3 series PMOS. The voltage switching point of NOR gate has a low value than ideal value of 2.5 Volt.

  • Free
  • Intermediate
  • <10
  • LTspice
  • IV
  • No
  • dc sweep analysis voltage switching point is 1.33V


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