Switching delays in a 3 input CMOS NAND

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LTspice Parametric analysis of switching delays in a 3 input Nand gate with a load capacitance that varies from 0 to 100 femtoFarad.

  • Free
  • Simple
  • <10
  • LTspice
  • IV
  • No
  • parametric analysis with changing load load capacitance varies from 0 to 100femtofarad


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